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Renesas Electronics /R7FA2A1AB /RTC /RFRL

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Interpret as RFRL

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RFC

Description

Frequency Register L

Fields

RFC

Frequency Comparison Value(b15-b0) To generate the operating clock from the main clock, this bit sets the comparison value of the 128-Hz clock cycle.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data